Customized CMOS Wafers - Combined Sources Sought Notice and Notice of Intent to Sole Source

The National Institute of Standards and Technology (NIST) is conducting market research to identify potential sources of commercial products/services that can provide customized CMOS wafers based on a previously developed reticle set owned by NIST. The wafers are designed for a wafer-scale 0.13 um CMOS chip fabrication process and will be used in developing a measurement and application testbed for novel electronic devices. The key requirements include: • Process flow shall be 0.13 um CMOS, Skywater FOSS SKY130 CMOS logic process node or equivalent • The wafers shall be bulk non-EPI silicon • The vendor must deliver wafers stopped at a specific process step • The vendor shall fabricate 12 engineering grade wafers using the above-mentioned reticle mask NIST is seeking information from sources that may be capable of meeting these requirements. Respondents should provide detailed information about their company, the equipment they can provide, and their capabilities.